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Optically Coupled 20 mA Current Loop Receiver Technical Data
HCPL-4200 Description
The HCPL-4200 optocoupler is designed to operate as a receiver in equipment using the 20 mA Current Loop. 20 mA current loop systems conventionally signal a logic high state by transmitting 20 mA of loop current (MARK), and signal a logic low state by allowing no more than a few milliamperes of loop current (SPACE). Optical coupling of the signal from the 20 mA current loop to the logic output breaks ground loops and provides for a very high common mode rejection. The HCPL-4200 aids in the design process by providing
Features
* Data Output Compatible with LSTTL, TTL and CMOS * 20 K Baud Data Rate at 1400 Metres Line Length * Guaranteed Performance over Temperature (0C to 70C) * Guaranteed On and Off Thresholds * LED is Protected from Excess Current * Input Threshold Hysteresis * Three-State Output Compatible with Data Buses * Internal Shield for High Common Mode Rejection * Safety Approval UL Recognized -2500 V rms, for 1 Minute CSA Approved * Optically Coupled 20 mA Current Loop Transmitter, HCPL-4100, Also Available
guaranteed thresholds for logic high state and logic low state for the current loop, providing an LSTTL, TTL, or CMOS compatible logic interface, and providing guaranteed common mode rejection. The buffer circuit on the current loop side of the HCPL-4200 provides typically 0.8 mA of hysteresis which increases the immunity to common mode and differential mode noise. The buffer also provides a controlled amount of LED drive current which takes into account any LED light output degradation. The internal shield allows a guaranteed 1000 V/s common mode transient immunity.
Functional Diagram
Applications
* Isolated 20 mA Current * Loop Receiver in: Computer Peripherals Industrial Control Equipment Data Communications Equipment
A 0.1 F bypass capacitor connected between pins 8 and 5 is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent damage and/or degradation which may be induced by ESD. 5965-3580E 1-373
Ordering Information
Specify part number followed by Option Number (if desired). HCPL-4200# XXX 300 = Gull Wing Surface Mount Lead Option 500 = Tape/Reel Package Option (1 K min) Option data sheets available. Contact your Hewlett-Packard sales representative or authorized distributor for information.
Package Outline Drawings - 8 Pin DIP Package (HCPL-4200)
9.65 0.25 (0.380 0.010) 8 7 6 5 7.62 0.25 (0.300 0.010) 6.35 0.25 (0.250 0.010)
TYPE NUMBER DATE CODE
HP XXXX YYWW RU 1 1.19 (0.047) MAX. 2 3 4
UL RECOGNITION
1.78 (0.070) MAX. + 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002)
5 TYP. 4.70 (0.185) MAX.
0.51 (0.020) MIN. 2.92 (0.115) MIN.
1.080 0.320 (0.043 0.013)
0.65 (0.025) MAX. 2.54 0.25 (0.100 0.010) DIMENSIONS IN MILLIMETERS AND (INCHES).
8 Pin DIP Package with Gull Wing Surface Mount Option 300 (HCPL-4200)
PAD LOCATION (FOR REFERENCE ONLY) 9.65 0.25 (0.380 0.010)
8 7 6 5
1.016 (0.040) 1.194 (0.047)
4.826 TYP. (0.190) 6.350 0.25 (0.250 0.010) 9.398 (0.370) 9.906 (0.390)
1
2
3
4
1.194 (0.047) 1.778 (0.070) 1.780 (0.070) MAX. 9.65 0.25 (0.380 0.010) 7.62 0.25 (0.300 0.010)
0.381 (0.015) 0.635 (0.025)
1.19 (0.047) MAX.
4.19 MAX. (0.165)
+ 0.076 0.254 - 0.051 + 0.003) (0.010 - 0.002)
1.080 0.320 (0.043 0.013) 0.635 0.130 2.54 (0.025 0.005) (0.100) BSC DIMENSIONS IN MILLIMETERS (INCHES). LEAD COPLANARITY = 0.10 mm (0.004 INCHES).
0.635 0.25 (0.025 0.010)
12 NOM.
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Thermal Profile (Option #300)
260 240 220 200 180 160 140 120 100 80 60 40 20 0 0 1 2 3 4 5 6 7 8 9 10 11 12 T = 145C, 1C/SEC T = 115C, 0.3C/SEC
TEMPERATURE - C
T = 100C, 1.5C/SEC
TIME - MINUTES
Figure 1. Maximum Solder Reflow Thermal Profile. (Note: Use of non-chlorine activated fluxes is recommended.)
Regulatory Information
The HCPL-4200 has been approved by the following organizations:
UL Recognized under UL 1577, Component Recognition Program, File E55361.
CSA Approved under CSA Component Acceptance Notice #5, File CA 88324.
Insulation and Safety Related Specifications
Parameter Min. External Air Gap (External Clearance) Min. External Tracking Path (External Creepage) Min. Internal Plastic Gap (Internal Clearance) Symbol L(IO1) L(IO2) Value Units 7.1 7.4 0.08 mm mm mm Conditions Measured from input terminals to output terminals, shortest distance through air Measured from input terminals to output terminals, shortest distance path along body Through insulation distance, conductor to conductor, usually the direct distance between the photoemitter and photodetector inside the optocoupler cavity DIN IEC 112/VDE 0303 PART 1 Material Group (DIN VDE 0110, 1/89, Table 1)
Tracking Resistance (Comparative Tracking Index) Isolation Group
CTI
200 IIIa
volts
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
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Absolute Maximum Ratings
(No Derating Required up to 70C) Storage Temperature .................................................. -55C to +125C Operating Temperature ................................................. -40C to +85C Lead Solder Temperature .... 260C for 10 s (1.6 mm below seating plane) Supply Voltage - VCC .............................................................. 0 V to 20 V Average Input Current - II ........................................... -30 mA to 30 mA Peak Transient Input Current - II ............................................... 0.5 A[1] Enable Input Voltage - VE ................................................ -0.5 V to 20 V Output Voltage - VO ........................................................ -0.5 V to 20 V Average Output Current - IO ....................................................... 25 mA Input Power Dissipation - PI ................................................... 90 mW[2] Output Power Dissipation - PO ............................................. 210 mW[3] Total Power Dissipation - P .................................................. 255 mW[4] Infrared and Vapor Phase Reflow Temperature (Option #300) .......................................... see Fig. 1, Thermal Profile
Recommended Operating Conditions
Parameter Power Supply Voltage Forward Input Current (SPACE) Forward Input Current (MARK) Operating Temperature Fan Out Logic Low Enable Voltage Logic High Enable Voltage Symbol VCC ISI IMI TA N VEL VEH Min. 4.5 0 14 0 0 0 2.0 Max. 20 2.0 24 70 4 0.8 20 Units Volts mA mA C TTL Loads Volts Volts
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DC Electrical Specifications
For 0C TA 70C, 4.5 V VCC 20 V, VE = 0.8 V, all typicals at TA = 25C and VCC = 5 V unless otherwise noted. See note 13. Parameter Symbol Mark State Input IMI Current Mark State Input VMI Voltage Space State Input ISI Current Space State Input VSI Voltage Input Hysteresis IHYS Current Logic Low Output VOL Voltage Logic High Output VOH Voltage Output Leakage IOHH Current (VOUT > VCC) Logic High Enable Voltage Logic Low Enable Voltage Logic High Enable Current Logic Low Enable Current Logic Low Supply Current Logic High Supply Current High Impedance State Output Current Logic Low Short Circuit Output Current Logic High Short Circuit Output Current Input Capacitance VEH VEL IEH Min. Typ. Max. Units 12 mA 2.52 2.75 Volts 3 1.6 0.3 0.8 0.5 2.4 100 500 2.0 0.8 20 100 0.004 250 -0.32 4.5 5.25 2.7 3.1 6.0 7.5 4.5 6.0 -20 20 100 500 2.2 mA Volts mA Volts Volts A A Volts Volts A A A mA mA mA mA mA A A A A mA mA mA mA 120 pF VE = 2.7 V VE = 5.5 V VE = 20 V VE = 0.4 V VCC = 5.5 V VCC = 20 V VCC = 5.5 V VCC = 20 V VO = 0.4 V VO = 2.4 V VO = 5.5 V VO = 20 V II = 0 mA VE = Don't Care II = 20 mA VE = Don't Care VE = 2 V, II = 20 mA II = 0.5 to 2.0 mA Test Conditions Fig. Note 2, 3, 4 4, 5
II = 20 mA
VE = Don't Care
2, 3, 4 VE = Don't 2, 4 Care 2 6 7
IOL = 6.4 mA II = 3 mA (4 TTL Loads) IOH = -2.6 mA, II = 12 mA VO = 5.5 V VO = 20 V II = 20 mA VCC = 4.5 V
IEL ICCL ICCH IOZL IOZH
IOSL
25 40
VO = VCC = 5.5 V VO = VCC = 20 V VCC = 5.5 V VCC = 20 V
II = 0 mA
5
IOSH
-10 -25
II = 20 mA VO = GND
5
CIN
f = 1 MHz, VI = 0 V dc, Pins 1 and 2
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Switching Specifications
For 0C TA 70C, 4.5 V VCC 20 V, VE = 0.8 V, all typicals at TA = 25C and VCC = 5 V unless otherwise noted. See note 13. Parameter Propagation Delay Time to Logic High Output Level Propagation Delay Time to Logic Low Output Level Propagation Delay Time Skew Output Enable Time to Logic Low Level Output Enable Time to Logic High Level Output Disable Time to Logic Low Level Output Disable Time to Logic High Level Output Rise Time (10-90%) Output Fall Time (90-10%) Common Mode Transient Immunity at Logic High Output Level Common Mode Transient Immunity at Logic Low Output Level Symbol tPLH tPHL tPLH - tPHL tPZL tPZH tPLZ tPHZ tr tf |CMH| Min. Typ. 0.23 0.17 60 25 28 60 105 55 15 1,000 10,000 Max. Units 1.6 s 1.0 s ns ns ns ns ns ns ns V/s Test Conditions VE = 0 V, CL = 15 pF VE = 0 V, CL = 15 pF II = 20 mA, CL = 15 pF II = 0 mA, CL = 15 pF II = 20 mA, CL = 15 pF II = 0 mA, CL = 15 pF II = 20 mA, CL = 15 pF VCC = 5 V, CL = 15 pF VCC = 5 V, CL = 15 pF VCM = 50 V (peak) II = 12 mA, TA = 25C VCM = 50 V (peak) II = 3 mA, TA = 25C Fig. Note 8, 9, 7 10 8, 9, 8 10 8, 9, 10 12, 13, 15 12, 13, 14 12, 13, 15 12, 13, 14 8, 9, 9 11 8, 9, 10 11 16 11
|CML|
1,000 10,000
V/s
16
12
Package Characteristics
For 0C TA 70C, unless otherwise specified. All typicals at TA = 25C. Parameter Symbol Min. Typ. Max. Units Test Conditions Input-Output Momentary VISO 2500 V rms RH 50%, t = 1 min, Withstand Voltage* TA = 25C Resistance, Input-Output RI-O 1012 ohms VI-O = 500 V dc Capacitance, Input-Output CI-O 1.0 pF f = 1 MHz, VI-O = 0 V Fig. Notes 6, 14 6 6
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output continuous voltage rating. For the continuous voltage rating refer to the VDE 0884 Insulation Characteristics Table (if applicable), your equipment level safety specification, or HP Application Note 1074, "Optocoupler Input-Output Endurance Voltage."
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Notes: 1. 1 s pulse width, 300 pps. 2. Derate linearly above 70C free air temperature at a rate of 1.6 mW/ C. Proper application of the derating factors will prevent IC junction temperatures from exceeding 125C for ambient temperatures up to 85C. 3. Derate linearly above 70C free air temperature at a rate of 3.8 mW/ C. 4. Derate linearly above 70C free air temperature at a rate of 4.6 mW/ C. 5. Duration of output short circuit time shall not exceed 10 ms. 6. The device is considered a two terminal device, pins 1, 2, 3, and 4 are connected together and pins 5, 6, 7, and 8 are connected together.
7. The tPLH propagation delay is measured from the 10 mA level on the leading edge of the input pulse to the 1.3 V level on the leading edge of the output pulse. 8. The tPHL propagation delay is measured from the 10 mA level on the trailing edge of the input pulse to the 1.3 V level on the trailing edge of the output pulse. 9. The rise time, tr, is measured from the 10% to the 90% level on the rising edge of the output logic pulse. 10. The fall time, tf, is measured from the 90% to the 10% level on the falling edge of the output logic pulse. 11. Common mode transient immunity in the logic high level is the maximum (negative) dVCM /dt on the trailing edge of the common mode pulse,
VCM , which can be sustained with the output voltage in the logic high state (i.e., VO 2 V). 12. Common mode transient immunity in the logic low level is the maximum (positive) dVCM /dt on the leading edge of the common mode pulse, VCM, which can be sustained with the output voltage in the logic low state (i.e., VO 0.8 V). 13. Use of a 0.1 F bypass capacitor connected between pins 5 and 8 is recommended. 14. In accordance with UL 1577, each optocoupler momentary withstand is proof tested by applying an insulation test voltage 3000 V rms for 1 second (leakage detection current limit, Ii-o 5 A).
10
II - INPUT SWITCHING THRESHOLD - mA
8
6 IHYS
4
2
0 -50
-25
0
25
50
75
100
TA - AMBIENT TEMPERATURE -C
Figure 2. Typical Output Voltage vs. Loop Current.
Figure 3. Typical Current Switching Threshold vs. Temperature.
Figure 4. Typical Input Loop Voltage vs. Input Current.
0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 -60 -40 -20 0 20 40 60 80 100 VCC = 4.5 V II = 3 mA IO = 6.4 mA
IOH - HIGH LEVEL OUTPUT CURRENT - mA
2.8
VOL - LOW LEVEL OUTPUT VOLTAGE - V
1.0
0 -1 -2 -3 -4 -5 -6 -7 -8 -60 VO = 2.4 V VO = 2.7 V VCC = 4.5 V II = 12 mA
VI - LOOP VOLTAGE - VOLTS
2.6 II = 20 mA II = 12 mA 2.4
2.2 -50
-25
0
25
50
75
100
-40
-20
0
20
40
60
80
100
TA - AMBIENT TEMPERATURE -C
TA - TEMPERATURE -C
TA - TEMPERATURE -C
Figure 5. Typical Input Voltage vs. Temperature.
Figure 6. Typical Logic Low Output Voltage vs. Temperature.
Figure 7. Typical Logic High Output Current vs. Temperature.
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Figure 8. Test Circuit for tPHL, tPLH, tr, and tf.
Figure 9. Waveforms for tPHL, tPLH, tr, and tf.
0.5 VCC = 5 V CL = 15 pF
tr, tf - RISE, FALL TIMES - ns
120 VCC = 5 V CL = 15 pF 100
tp - PROPAGATION DELAY - s
0.4
80 tr 60
0.3 tPLH 0.2 tPHL 0.1
40
20 tf 0 -60
0 -60
-40
-20
0
20
40
60
80
100
-40
-20
0
20
40
60
80
100
TA - TEMPERATURE -C
TA - TEMPERATURE -C
Figure 10. Typical Propagation Delay vs. Temperature.
Figure 11. Typical Rise, Fall Time vs. Temperature.
+5 V
Figure 12. Test Circuit for tPZH, tPZL, tPHZ, and tPLZ.
Figure 13. Waveforms for tPZH, tPZL, tPHZ, and tPLZ.
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200
tp - ENABLE PROPAGATION DELAY - ns tp - ENABLE PROPAGATION DELAY - ns
100
CL = 15 pF
VCC 20 V
CL = 15 pF 80 tPLZ 60
VCC 20 V
150 tPHZ 4.5 V 100
4.5 V
20 V 40 tPZL 20 4.5 V
20 V 50 tPZH 0 -60 4.5 V
-40
-20
0
20
40
60
80
100
0 -60
-40
-20
0
20
40
60
80
100
TA - TEMPERATURE -C
TA - TEMPERATURE -C
Figure 14. Typical Logic High Enable Propagation Delay vs. Temperature.
Figure 15. Typical Logic Low Enable Propagation Delay vs. Temperature.
Figure 16. Test Circuit for Common Mode Transient Immunity.
Applications
Data transfer between equipment which employs current loop circuits can be accomplished via one of three configurations: simplex, half duplex or full duplex communication. With these configurations, point-topoint and multidrop arrangements are possible. The appropriate configuration to use depends upon data rate, number of stations, number and length of lines, direction of data flow, protocol, current source location and voltage compliance value, etc. Simplex The simplex configuration, whether point to point or multidrop, gives unidirectional data flow from transmitter to receiver(s). This is the simplest
configuration for use in long line length (two wire), for high data rate, and low current source compliance level applications. Block diagrams of simplex pointto-point and multidrop arrangements are given in Figures 17a and 17b respectively for the HCPL-4200 receiver optocoupler. For the highest data rate performance in a current loop, the configuration of a non-isolated active transmitter (containing current source) transmitting data to a remote isolated receiver(s) should be used. When the current source is located at the transmitter end, the loop is charged approximately to VMI (2.5 V). Alternatively, when the current source is located at the receiver end, the loop is charged to the full compliance voltage level. The
lower the charged voltage level the faster the data rate will be. In the configurations of Figures 17a and 17b, data rate is independent of the current source voltage compliance level. An adequate compliance level of current source must be available for voltage drops across station(s) during the MARK state in multidrop applications or for long line length. The maximum compliance level is determined by the transmitter breakdown characteristic. A recommended non-isolated active transmitter circuit which can be used with the HCPL-4200 in point-to-point or in multidrop 20 mA current loop applications is given in Figure 18. The current source is controlled via a standard TTL 7407 buffer to provide high output impedance of current source in both the ON
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Figure 17. Simplex Current Loop System Configurations for (a) Point-to-Point, (b) Multidrop.
and OFF states. This non-isolated active transmitter provides a nominal 20 mA loop current for the listed values of VCC, R2 and R3 in Figure 18. Length of current loop (one direction) versus minimum required DC supply voltage, VCC, of the circuit in Figure 18 is graphically illustrated in Figure 19. Multidrop configurations will require larger VCC than Figure 19 predicts in order to account for additional station terminal voltage drops. Typical data rate performance versus distance is illustrated in Figure 20 for the combination of a non-isolated active transmitter
and HCPL-4200 optically coupled current loop receiver shown in Figure 18. Curves are shown for 10% and 25% distortion data rate. 10% (25%) distortion data rate is defined as that rate at which 10% (25%) distortion occurs to output bit interval with respect to input bit interval. An input Non-Return-to-Zero (NRZ) test waveform of 16 bits (0000001011111101) was used for data rate distortion measurements. Data rate is independent of current source supply voltage, VCC. The cable used contained five pairs of unshielded, twisted, 22 AWG wire (Dearborn #862205). Loop current is 20 mA nominal.
Input and output logic supply voltages are 5 V dc. Full Duplex The full duplex point-to-point communication of Figure 21 uses a four wire system to provide simultaneous, bidirectional data communication between local and remote equipment. The basic application uses two simplex point-to-point loops which have two separate, active, non-isolated units at one common end of the loops. The other end of each loop is isolated. As Figure 21 illustrates, the combination of Hewlett-Packard current loop optocouplers, HCPL4100 transmitter and HCPL-4200
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Figure 18. Recommended Non-Isolated Active Transmitter with HCPL-4200 Isolated Receiver for Simplex Point-to-Point 20 mA Current Loop.
receiver, can be used at the isolated end of current loops. Cross talk and common mode coupling are greatly reduced when optical isolation is implemented at the same end of both loops, as shown. The full duplex
data rate is limited by the nonisolated active receiver current loop. Comments mentioned under simplex configuration apply to the full duplex case. Consult the HCPL-4100 transmitter optocoupler data sheet for specified device performance.
TA = 25 C
Half Duplex The half duplex configuration, whether point-to-point or multidrop, gives nonsimultaneous bidirectional data flow from transmitters to receivers shown in Figures 22a and 22b. This configuration allows the use of two wires to carry data back and forth between local and remote units. However, protocol must be used to determine which specific transmitter can operate at any given time. Maximum data rate for a half duplex system is limited by the loop current charging time. These considerations were explained in the Simplex configuration section. Figures 22a and 22b illustrate half duplex application for the combination of HCPL-4100/-4200 optocouplers. The unique and complementary designs of the HCPL-4100 transmitter and HCPL-4200 receiver optocouplers provide many designed-in benefits. For example, total optical isolation at one end of the current loop is easily accomplished, which results in substantial removal of common mode influences, elimination of ground potential
Figure 19. Minimum Required Supply Voltage, VCC, vs. Loop Length for Current Loop Circuit of Figure 19.
Figure 20. Typical Data Rate vs. Distance.
Figure 21. Full Duplex Point-to-Point Current Loop System Configuration.
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differences and reduction of power supply requirements. With this combination of HCPL-4100/ -4200 optocouplers, specific current loop noise immunity is provided, i.e., minimum SPACE state current noise immunity is 1 mA, MARK state noise immunity is 8 mA.
Voltage compliance of the current source must be of an adequate level for operating all units in the loop while not exceeding 27 V dc, the maximum breakdown voltage for the HCPL-4100. Note that the HCPL-4100 transmitter will allow loop current to conduct when input VCC power is off. Consult
the HCPL-4100 transmitter optocoupler data sheet for specified device performance. For more information about the HCPL-4100/-4200 optocouplers, consult Application Note 1018.
Figure 22. Half Duplex Current Loop System Configurations for (a) Point-to-Point, (b) Multidrop.
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